IA Resilience call reinforcing Europe's strenght in power electronics
Innovation Action to strengthen Europe's power electronics via advanced materials, devices, AI, and packaging technologies.
This call funds innovation projects to enhance Europe's power electronics sector. It focuses on new materials, device technologies, AI integration, and advanced packaging. The goal is to reduce dependency, improve performance, and boost competitiveness.
Likely relevant for
- Power electronics manufacturers
- Semiconductor device developers
- Materials scientists in wide bandgap semiconductors
- AI system integrators for electronics
- Advanced packaging technology developers
- Research institutions in electronic components
Project signals
What it funds
- Innovations in wide bandgap (WBG) substrates to reduce EU dependency
- Development of WBG platforms for cost-effective power devices
- Toolbox technologies like wafer cutting, smart stacking, epitaxy, UWBG materials
- Next-generation or optimized power semiconductor devices
- Adding intelligence via control or sensor integration in devices
- Advancing EU packaging and integration excellence along value chain
- Heterogeneous and functional integration for improved performance and cost
- Advanced characterization techniques for materials, devices, and systems
- Implementation of AI at system level to accelerate innovation
Expected outcomes
- Reduced EU dependency on critical materials
- Improved yield, power density, and cost-effectiveness of power devices
- Enhanced competitiveness of European power electronics industry
- More robust, reliable, and efficient power semiconductor devices
- Integration of AI to speed up innovation and improve system control
- Strengthened European leadership in advanced packaging and integration
Who can apply / participate
- Industry participants including SMEs and large enterprises
- Research organizations and universities
- Consortia involving multiple partners
- Check specific consortium composition rules in call documents
- Eligible countries as defined in Chips JU Work Programme Appendix 7
- Refer to Chips JU website and call documents for detailed eligibility conditions
- Exact eligible countries and consortium size requirements must be verified
Must check before shortlisting
- Eligibility criteria regarding countries and consortium
- Specific budget and funding conditions
- Submission requirements and page limits
Money
Total budget of €20 million for 2026 with expected grants between €1 million and €10 million each.
- Total budget for 2026 — 20000000EURAllocated for this call in 2026
- Minimum grant per project — 1000000EURMinimum expected EU contribution per grant
- Maximum grant per project — 10000000EURMaximum expected EU contribution per grant
Application notes
- Single-stage submission model.
- Proposal page limits and layout detailed in Part B of Application Form
- Refer to Appendix 7 of Chips JU Work Programme for eligibility and conditions
- Specific documents include Guide for Applicants, Evaluation Form, Application templates
- Legal and financial set-up details in Annotated Model Grant Agreement
- Prepare proposal according to call and application guidelines
- Submit proposal via Funding & Tenders Portal before deadline
- Ensure compliance with admissibility and eligibility criteria
- Use provided templates and forms for submission
- Check eligibility of countries and consortium composition
- Follow page limits and formatting strictly
- Review all call-specific instructions and legal documents before submission
Derived from official EU Funding portal source · updated 7 Jul 2026, 12:20 UTC. Use this as a shortlisting aid; the official call text remains authoritative.
Official source text
Fine print from the EU source record. Expand when you need the original wording.
Topic description
Scope: Proposals innovations should address one or more of the several domains : WBG substrates to reduce EU dependency on material and provide more sustainable, industrially compatible solutions. WBG platform for cost effectiveness, available in 300mm for GaN and/or SiC to improve yield and power density and close gaps in the value chain. A toolbox (e.g. wafer cut, smart stacking, thin layer transfer, epitaxy, UWBG materials) for further innovation schemes. Next generation or optimised new power semiconductor devices fitting their application. Adding intelligence to power semiconductor devices on control and/or sensor side. Facilitate the propagation of EU Packaging/Integration excellence along the entire value chain e.g. pre-packages or power semiconductor device packaging solutions to enable power device/system integration and strengthen Europe’s competitiveness in advanced packaging. Explore the use of heterogeneous and functional integration for improved performance, reliability, robustness and cost competitiveness. Rising operative voltage, frequency, current and thermal features that are common challenge on power electronics across the different application sectors. Provide stable and clean power supply that minimises disruptions, equipment failures, and data corruption. Advanced characterization techniques for new materials, devices, and systems. Implement AI at system level and/or make use of AI methods to increase the innovation speed.
Conditions and documents
General conditions
1. Admissibility conditions: Proposal page limit and layout
Proposal page limits and layout: detailed in Part B of the Application Form, which you can access from the Call documents section on the Chips JU website's Call page
The following information are all described in the Appendix 7 of the Chips JU Workprogramme
2. Eligible countries
3. Other Eligibility Conditions
4. Financial and operational capacity and exclusion
5a. Evaluation and award: Award criteria, scoring and thresholds
5b. Evaluation and award: Submission and evaluation processes
5c. Evaluation and award: Indicative timeline for evaluation and grant agreement
6. Legal and financial set-up of the grants
Specific conditions
Please visit the Chips JU website's Call page
Calls documents
Please refer to the calls documents section on the Chips JU website's Call page to view and download all required documents and templates.
Specific documents
2026 Guide for Applicants RIA_IA_FT-FPP
Evaluation Form Chips IA RIA FT-FPP
Template Application form Part B IA-RIA-FT FPP
Ownership Control Declaration form template
National Budgets Table template (xls)
General documents
Chips JU Multiannual Work Programme
Appendix 7 to the Work Programme - Electronic Components and Systems (ECS) - 2026
PAB decision on the evaluation and selection procedures related to Calls for Proposals
ECS Strategic Research and Innovation Agenda
Annotated Model Grant Agreement for EU Funding Programmes 2021-2027
Application and evaluation forms and model grant agreement (MGA):
Model Grant Agreements (MGA)
Call-specific instructions
Additional documents:
Support information
For help related to this call, please contact calls@chips-ju.europa.eu Online Manual is your guide on the procedures from proposal submission to managing your grant. Funding & Tenders Portal FAQ – find the answers to most frequently asked questions on submission of proposals, evaluation and grant management. IT Helpdesk – contact the Funding & Tenders Portal IT helpdesk for questions such as forgotten passwords, access rights and roles, technical aspects of submission of proposals, etc. Partner Search help you find a partner organisation for your proposal.
Raw budget overview
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